A Review on Crosstalk Avoidance and Minimization in VLSI Systems

نویسندگان

  • Achira Pal
  • Tarak Nath Mandal
  • Abhinandan Khan
  • Rajat Kumar Pal
  • Alak Kumar Datta
  • Raja S. C. Mullick
چکیده

With advancements in VLSI fabrication technology, interconnecting wires are being placed in closer proximity while circuits are starting to operate at higher frequencies. Thus, reduction in crosstalk between interconnects becomes an important consideration for VLSI physical design. In this paper, we have reviewed the effects and impact that crosstalk has on the performance and reliability of VLSI circuits and systems. We have also presented a concise but informative review on the various methods that researchers worldwide are implementing for a priori crosstalk avoidance or a posteriori crosstalk minimization in VLSI systems from the point of view of fabrication over the past few decades. Keywords—Crosstalk, coupling capacitance, dynamic power, NoC, SoC, VLSI.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Comprehensive Evaluation of Crosstalk and Delay Profiles in VLSI Interconnect Structures with Partially Coupled Lines

In this paper, we present a methodology to explore and evaluate the crosstalk noise and the profile of its variations, and the delay of interconnects through investigation of two groups of interconnect structures in nano scale VLSI circuits. The interconnect structures in the first group are considered to be partially coupled identical lines. In this case, by choosing proper values for differen...

متن کامل

Optimal low-power coding for error correction and crosstalk avoidance in on-chip data buses

Coupled switched capacitance causes crosstalk in ultra deep submicron/nanometer VLSI fabrication, which leads to power dissipation, delay faults, and logical malfunctions. We present the first memoryless transition bus-encoding technique for power minimization, errorcorrection, and elimination of crosstalk simultaneously. To accomplish this, we generalize balanced sampling plans avoiding adjace...

متن کامل

Crosstalk Noise Reduction Using Driver Sizing Optimization in Vlsi Rc Global Interconnects Using 90nm Process Technology

In this paper noise avoidance in closed form crosstalk noise model for on-chip VLSI RC interconnects using 2π model is presented. In this crosstalk noise model we consider the case when step input is applied to the aggressor which is adjacent to the victim net and further simplified it, then find out the closed form formulae for noise pulse width and noise amplitude for RC interconnect. Various...

متن کامل

Simulated Annealing Approach to Crosstalk Minimization in Gridded Channel Routing

The inter-wire spacing in a VLSI chip becomes closer as the VLSI fabrication technology rapidly evolves. Accordingly, it becomes important to minimize crosstalk caused by the coupling capacitance between adjacent wires in the layout design for the fast and safe VLSI circuits. We present a simulated annealing approach based on segment rearrangement to crosstalk minimization in an initially gridd...

متن کامل

COP: a Crosstalk OPtimizer for gridded channel routing

| The inter-wire spacing in a VLSI chip becomes closer as the VLSI fabrication technology rapidly evolves. Accordingly, it becomes important to consider crosstalk caused by the coupling capacitance between adjacent wires in the layout design for the fast and safe VLSI circuits. The upper bounds of the allowable crosstalk for nets, called cross-talk constraints, are usually given in the design s...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2015